SAN JOSE, Calif.--(BUSINESS WIRE)--Altera Corporation, the largest pure-play FPGA provider with a full-spectrum portfolio, today introduced QuartusIQ, an AI expert companion for Quartus Prime Pro software designed to accelerate the complete FPGA development flow. QuartusIQ helps FPGA developers apply expert guidance and repeatable workflows within Quartus Prime, enabling users to create, debug and validate designs more efficiently, resolve issues with greater confidence and move from design intent to signoff faster.
With QuartusIQ, developers use natural-language prompts to work through design tasks and automate routine analysis. Because it understands the active Quartus project, including device, IP, constraints, reports and timing data, QuartusIQ can help identify the next steps for meeting timing and completing verification, while engineers remain in control of key design decisions.
Altera expects QuartusIQ to help developers shave months off the path to production, with up to 1.5X faster¹ total design cycles through simpler development and faster design closure. On a 24-month design cycle, that level of improvement could represent several months saved.
“FPGA developers are under increasing pressure to deliver more capable designs while managing growing device, IP, timing and verification complexity,” said Farhad Shafai, head of Business Solutions and Marketing at Altera. “Agentic AI brings expert guidance and workflow automation into the development environment, helping engineers spend less time searching for information and coordinating routine tasks, and more time making the design decisions that move products toward production. With QuartusIQ, customers can apply project-aware FPGA expertise across the design flow while keeping engineers in control.”
Project-Aware Guidance for Physical AI Workflows
Using an open-standard Model Context Protocol (MCP) interface, QuartusIQ connects AI agents with the Quartus development environment and supported tools. The interface enables agents to access the developer’s active project context and relevant Altera resources, including information about the FPGA, IP, boards, interfaces, reference designs, and documentation. Agents can then give accurate, design-aware help with configuring IP, writing constraints, and resolving compilation and timing issues, all from inside the developer’s existing workflow.
QuartusIQ extends its project-aware assistance to Physical AI design, helping engineers refine FPGA implementations and prepare validated designs for deployment in applications such as robotics, industrial automation and autonomous machines.
For example, an engineer developing an autonomous mobile robot could use QuartusIQ to examine an active project that includes camera, LiDAR, radar, inertial-sensor and motor-control interfaces, then prioritize compile, verification and timing issues for the next iteration. This can help move the design from system intent toward a validated FPGA implementation for edge deployment.
QuartusIQ Run-Time Harness: Native FPGA Workflow Orchestration
Enhancing developer productivity and ease of use, QuartusIQ includes a run-time harness that orchestrates AI-assisted workflows directly within the Quartus GUI. Grounded in the active project and QuartusIQ skills, the harness coordinates multi-step tasks, invokes relevant Quartus tools and skills through MCP-connected interfaces, evaluates compile, verification and timing results, and guides the next action. This closed-loop workflow enables engineers to move from natural-language intent to analysis and iterative design refinement without manually coordinating separate tools, while remaining in control of consequential design decisions.
QuartusIQ supports customer-selected frontier and open-weight models where supported, with deployment options in the cloud or on premises. This flexibility allows teams to choose models based on capability, latency, cost and deployment requirements while using the same integrated Quartus workflow.
On-Premises Deployment with NVIDIA DGX Station for Windows
QuartusIQ is optimized to run on NVIDIA DGX Station for Windows, providing an on-premises environment for AI-assisted FPGA development that helps keep sensitive design data and intellectual property within an organization’s own infrastructure. Supported open-weight NVIDIA Nemotron models can run locally, enabling QuartusIQ agents to help teams create designs, debug issues and close timing.
NVIDIA DGX Station for Windows is the ultimate deskside AI supercomputer to build and run powerful AI agents connected to enterprise applications and workflows. Powered by NVIDIA GB300 Grace Blackwell Ultra Desktop Superchip and a massive 748 GB of coherent memory, the system runs frontier AI models and many parallel agents across productivity, creative, design, engineering and physical AI applications, with RTX-accelerated visualization.
"Agentic AI will help engineers tackle increasingly complex FPGA software workflows and move from design intent to validated implementations faster,” said Chris Marriott, vice president, Enterprise Platforms, NVIDIA. “Together with Altera, we’re optimizing our Nemotron models for QuartusIQ’s specialized capabilities. Running this agentic AI locally on the DGX Station gives engineers the ultimate deskside supercomputer to accelerate development without ever having to compromise the security of their sensitive IP."
Availability
QuartusIQ, including QuartusIQ AI Expert Companion native GUI support, MCP, the Visual Studio Code extension with agent harness, and Skills will be available in Quartus Prime Pro software v26.3, set to be released at Altera Innovators Day on October 28, 2026.
About Altera
Altera provides high-performance, programmable compute and connectivity solutions that enable the rapid adoption and continued advancement of transformative technologies across a wide range of advanced and AI-enabled systems. Altera is the largest pure-play FPGA provider with a full-spectrum portfolio serving applications ranging from data centers and communications networks to critical embedded systems.
¹ Based on Altera’s internal analysis of representative FPGA design workflows, compared with completing the same tasks manually in Quartus Prime without QuartusIQ. Performance varies by use, configuration and other factors. Performance results are based on testing as data shown in configurations and may not reflect all publicly available updates.
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